1-2
Introduction
processor to meet the flexibility requirements of SCSI-3 and Ultra2 SCSI
standards. It is designed to implement multithreaded I/O algorithms with
a minimum of processor intervention, solving the protocol overhead
problems of previous intelligent and nonintelligent adapter designs.
illustrates a typical LSI53C896 system and
illustrates a typical LSI53C896 board application.
Figure 1.1
Typical LSI53C896 System Application
Fixed Disk, Optical Disk,
Printer, Tape, and Other
Peripherals
Fixed Disk, Optical Disk,
Printer, Tape, and Other
Peripherals
One PCI Bus Load
PCI Graphic Accelerator
PCI Fast Ethernet
Memory
Controller
Memory
PCI Bus
Interface
Controller
Central
Processing
Unit
(CPU)
Typical PCI Computer
System Architecture
Processor Bus
LSI53C896 PCI
to Wide Ultra2 SCSI
Function A
and
LSI53C896 PCI
to Wide Ultra2 SCSI
Function B
SCSI Bus
SCSI Bus
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...