4-90
Registers
Note:
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another.
HTH[7:4], SEL[3:0],
GEN[3:0]
1
Minimum Time-out
(40 or 160 MHz Clock)
2
HTHSF = 0,
GENSF = 0
HTHSF = 1,
GENSF = 1
0000
Disabled
Disabled
0001
125
µ
s
2 ms
0010
250
µ
s
4 ms
0011
500
µ
s
8 ms
0100
1
µ
s
16 ms
0101
2 ms
32 ms
0110
4 ms
64 ms
0111
8 ms
128 ms
1000
16 ms
256 ms
1001
32 ms
512 ms
1010
64 ms
1 s
1011
128 ms
2 s
1100
256 ms
4.1 s
1101
512 ms
8.2 s
1110
1.024 s
16.4 s
1111
2.048 s
32.8 s
1. These values will be correct if the CCF bits in the
register are set according to the
valid combinations in the bit description.
2. Ultra2 SCSI operation requires a quadrupled 40 MHz clock.
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...