LSI LSI53C896, Technical Manual

Page: 233 / 370

Block Move Instructions 5-5
5.2.1 First Dword
Figure 5.2 Block Move Instruction - First Dword
IT[1:0] Instruction Type-Block Move [31:30]
IA Indirect Addressing 29
Direct
When this bit is cleared, user data is moved to or from
the 32-bit data start address for the Block Move
instruction. The value is loaded into the chip’s address
register and incremented as data is transferred. The
address of the data to move is in the second Dword of
this instruction.
When the EN64DBMV bit in Chip Control 1 (CCNTL1) is
set, a third Dword is fetched to provide the upper Dword
of a 64-bit address. The upper Dword address will be
fetched along with the instruction and loaded into the
Dynamic Block Move Selector (DBMS) register.
If the EN64DBMV bit is cleared, then the upper Dword
address is pulled from the
Static Block Move Selector
(SBMS) register.
The byte count and absolute address are as follows:
Indirect
When set, the 32-bit user data start address for the Block
Move is the address of a pointer to the actual data buffer
address. The value at the 32-bit start address is loaded
into the chip’s
DMA Next Address (DNAD) register using
a third Dword fetch (4-byte transfer across the host
computer bus).
31 30 29 28 27 26 24 23 0
DCMD Register DBC Register
IT[1:0] IA TIA OPC SCSIP[2:0] TC[23:0]
Command Byte Count
Lower Dword Address of Data
Upper Dword address of data (EN64DBMV = 1)
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