5-8
SCSI SCRIPTS Instruction Set
If the enable 64-bit Table Indirect Block Move
(EN64TIBMV) bit is set and the 64-bit Table Indirect Index
Mode (64TIMOD) bit is cleared, then bits [28:24] of the
first Dword of the table entry (where the byte count is
located) will select one of the 16 scratch registers or any
of the six 64-bit selector registers (for a total of
22 selector choices) as a selector for the upper 32-bit
address. Please see the Table Indirect Index mode
mapping table for a breakdown of index values and the
corresponding registers selected. The selected address
will get loaded into the
automatically.
Note:
If EN64TIBMV is set and 64TIMOD is set then bits [31:24]
of the first Dword of the table entry (where the byte count
is located) will be loaded directly into
to provide a 40-bit address.
The format for the table indirect entries for each mode is
shown below. The table for Table Indirect block moves
upper 32-bit address locations summarizes the available
modes for table indirect block moves.
Index Mode 0 (64TIMOD clear) table entry format:
Index Mode 1 (64TIMOD set) table entry format:
Table Indirect block moves upper 32-bit address
locations:
31
29 28
24 23
0
R
Sel Index
Byte Count
Source/Destination Address [31:0]
31
24 23
0
Src/Dest Addr [39:32]
Byte Count
Source/Destination Address [31:0]
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...