4-8
Registers
Register: 0x0D
Latency Timer
Read/Write
LT
Latency Timer
[7:0]
The Latency Timer register specifies, in units of PCI bus
clocks, the value of the Latency Timer for this PCI bus
master. The SCSI functions of the LSI53C896 support
this timer. All eight bits are writable, allowing latency
values of 0–255 PCI clocks. Use the following equation to
calculate an optimum latency value for the SCSI functions
of the LSI53C896.
Latency = 2 + (Burst Size x (typical wait 1))
Values greater than optimum are also acceptable.
Register: 0x0E
Header Type
Read Only
HT
Header Type
[7:0]
This 8-bit register identifies the layout of bytes 0x10
through 0x3F in configuration space and also whether or
not the device contains multiple functions. Since the
LSI53C896 is a multifunction controller the value of this
register is 0x80.
Register: 0x0F
Not Supported
7
0
LT
0
0
0
0
0
0
0
0
7
0
HT
0
0
0
0
0
0
0
0
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...