6-56
Specifications
Figure 6.32 Slow Memory (
≥
128 Kbytes) Write Cycle
Table 6.36
Slow Memory (
≥
128 Kbytes) Write Cycle
Symbol
Parameter
Min
Max
Unit
t
11
Address setup to MAS/ HIGH
25
–
ns
t
12
Address hold from MAS/ HIGH
15
–
ns
t
13
MAS/ pulse width
25
–
ns
t
20
Data setup to MWE/ LOW
30
–
ns
t
21
Data hold from MWE/ HIGH
20
–
ns
t
22
MWE/ pulse width
100
–
ns
t
23
Address setup to MWE/ LOW
75
–
ns
t
24
MCE/ LOW to MWE/ HIGH
120
–
ns
t
25
MCE/ LOW to MWE/ LOW
25
–
ns
t
26
MWE/ HIGH to MCE/ HIGH
25
–
ns
CLK
(Driven by System)
1
2
3
4
5
6
7
8
9
10
MAD
(Driven by LSI53C896)
High Order
Address
Middle Order
Address
Low Order
Address
MAS1/
(Driven by LSI53C896)
MAS0/
(Driven by LSI53C896)
MCE/
(Driven by LSI53C896)
MOE/
(Driven by LSI53C896)
MWE/
(Driven by LSI53C896)
t
13
t
11
t
12
t
24
t
25
Write
Data
Valid
t
23
t
20
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...