12.10.1
12.10.2
12.10.3
Connector pinning GN6470 and GN4070
12.10.4
GN6470 and GN4070 Input block diagram
12.10.5
GN6470 and GN4070 Counter mode pinning
12.10.6
GN6470 and GN4070 Frequency (RPM) mode pinning
12.10.7
GN6470 and GN4070 Quadrature (position) mode pinning
12.10.8
Configure the Timer/Counters in Perception
12.10.8.1
To activate Channel 8 or Channel 9 in Perception
12.10.9
13
13.1
13.1.1
13.2
14
GEN series Synchronization Methods
14.1
14.1.1
14.1.1.1
14.1.2
14.1.3
Best master clock algorithm (BMC)
14.2
14.2.1
Switches using boundary clocks
14.2.2
Switches using transparent clocks
14.2.2.1
14.2.2.2
Peer-to-Peer transparent clocks
14.2.3
One-Step and Two-Step clock synchronization
14.3
Transparent clock switch synchronization
14.3.1
14.3.2
14.4
Common terms used in IEEE 1588
14.5
GEN series synchronization methods compared
14.5.1
Signal phase shift synchronization
14.5.2
14.5.3
Absolute time of day synchronization
14.5.4
14.5.5
Synchronization specification overview
GEN3i
I3763-3.1 en HBM: public
11