Block Diagram
+
-
F
n
-1
n
-1
z
-1
z
-1
Σ
a
1
a
2
b
2
b
1
x
(n)
y
(n)
A
T
+
-
+
-
+
-
U
-1
I
Sample Rate
Channel &
Card Trigger
Communication
& Memory &
Recording control
Synchronization
& Sample Rate
1.0 or 1.024 MHz
1.0 or 1.024 MHz
Backplane
System Trigger Bus
Communication and
Data Streaming
Acquisition Control
Master Time Base
1010
F
A
Amplifier
Analog
Anti-Alias Filter
ADC
Isolation
Digital Filter &
Sample Rate selection
Channel 1 to 4
Sense (+)
Excitation (+)
Excitation (-)
Sense (-)
Signal (+)
Signal (-)
Signal ground
350 Ω
QB
HB+
HB-
CAL
User Ω
Ext Shunt cm
Ext Shunt
Rem CAL cm
CAL
Rem CAL(+)
Rem CAL(-)
Driven Guard
AC/DC/GND
Signal ground
Sense On/Off
Off / Voltage / Current
3 Wire
¼ Bridge
½ Bridge
½ Bridge
Shunt
Calibration
Select Shunt
Basic
Guard
Completion
Card
Excitation
Figure A.22:
Block Diagram
Note The specifications listed are valid for cards that have been calibrated and are used in the same mainframe and
slots as they were at the time of calibration. When the card is removed from its original location and placed in
another slot and/or mainframe, the Offset error, Gain error and MSE specifications are expected to increase
(up to double the original specification) due to thermal differences within the configurations. All specifications
are defined at 23 °C
±
2 °C, unless specified differently.
GEN3i
I3763-3.1 en HBM: public
401
