IEEE 1588
-
2008 uses a hierarchical selection algorithm based on the following
properties, in the indicated order:
1
Priority 1
2
Class
3
Accuracy
4
Variance
5
Priority 2
6
Unique identifier (tie breaker)
(1) “PTP technology background”, “PTP Protocol details” and “Best master
clock algorithm”: Source: Wikipedia
®
the free encyclopedia
HBM systems use the following details for BMC:
GEN3i/GEN7i
GEN3t/GEN7tA
GEN17tA
GEN7t/GEN16t
(When using IM2)
QuantumX
(B hardware)
Priority 1
128
128
128
Class
248
248
248
Accuracy
FE
FE
FE
Variance
FFFF
FFFF
FFFF
Priority 2
122
125
128
When using any of the HBM systems listed in this table, the systems in the
leftmost column are granted Master rights based on the BMC algorithm.
Adjustments to synchronize to an external clock result in small deviations of the
sample period. Technically speaking, this could be seen as jitter on the ADC
clock. Depending on the jitter value, this results in noise, especially during
frequency domain evaluations (FFT).
If sample rates are higher, the small corrections are relatively large compared
to the same adjustment to sample rates that are 100 times lower. Therefore,
the faster sampling systems are prioritized within the HBM range to become
clock master.
HINT/TIP
For each field, the smallest value will wins. For example, if Priority 1 for System
A is smaller when compared to System B, all the other fields are no longer
monitored/analyzed, as the weight of the first field outweighs all other fields.
GEN3i
I3763-3.1 en HBM: public
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