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Table 2.8
Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Instruction
Format
Effective Addresses Calculation
Equation
PC relative
addressing
disp:8
The effective address is the PC value sign-extended
with an 8-bit displacement (disp), doubled, and
added to the PC value.
PC
2
+
×
disp
(sign-extended)
PC + disp
×
2
PC + disp
×
2
disp:12
The effective address is the PC value sign-extended
with a 12-bit displacement (disp), doubled, and
added to the PC value.
PC
2
+
×
disp
(sign-extended)
PC + disp
×
2
PC + disp
×
2
Rn
The effective address is the register PC value
plus Rn.
PC
Rn
PC + Rn
+
PC + Rn
Immediate
addressing
#imm:8
The 8-bit immediate data (imm) for the TST, AND,
OR, and XOR instructions are zero-extended.
—
#imm:8
The 8-bit immediate data (imm) for the MOV, ADD,
and CMP/EQ instructions are sign-extended.
—
#imm:8
The 8-bit immediate data (imm) for the TRAPA
instruction is zero-extended and is quadrupled.
—
Summary of Contents for SH7041 Series
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