Renesas SH7041 Series, Hardware Manual, Page: 688 / 923

650
19.2.1 Register Configuration
Table 19.3 summarizes the port A register.
Table 19.3 Port A Register
Name Abbreviation R/W Initial Value Address Access Size
Port A data register H PADRH R/W H'0000 H'FFFF8380
H'FFFF8381 8, 16, 32
Port A data register L PADRL R/W H'0000 H'FFFF8382
H'FFFF8383 8, 16, 32
19.2.2 Port A Data Register H (PADRH)
PADRH is a 16-bit read/write register that stores data for port A. The bits PA23DR–PA16DR
correspond to the PA23/
WRHH
–PA16/
AH
pins. When the pins are used as ordinary outputs, they
will output whatever value is written in the PADRH; when PADRH is read, the register value will
be output regardless of the pin status. When the pins are used as ordinary inputs, the pin status
rather than the register value is read directly when PADRH is read. When a value is written to
PADRH, that value can be written into PADRH, but it will not affect the pin status. Table 19.4
shows the read/write operations of the port A data register.
PADRH is initialized by an external power-on reset. However, PADRH is not initialized for
manual reset, reset by WDT, standby mode, or sleep mode.
These register settings function only for the 144-pin version. There are no pins corresponding to
this register in the 112-pin version. However, read/writes are possible.
Bit: 15 14 13 12 11 10 9 8
— — — — — — — —
Initial value: 0 0 0 0 0 0 0 0
R/W: R R R R R R R R
Bit: 7 6 5 4 3 2 1 0
PA23DR PA22DR PA21DR PA20DR PA19DR PA18DR PA17DR PA16DR
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W