Renesas SH7041 Series, Hardware Manual, Page: 32 / 923

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14.4 SCI Interrupt Sources and the DMAC/DTC...................................................................... 532
14.5 Notes on Use ...................................................................................................................... 533
14.5.1 TDR Write and TDRE Flags ................................................................................ 533
14.5.2 Simultaneous Multiple Receive Errors................................................................. 533
14.5.3 Break Detection and Processing ........................................................................... 534
14.5.4 Sending a Break Signal......................................................................................... 534
14.5.5 Receive Error Flags and Transmitter Operation (Clock Synchronous Mode
Only)..................................................................................................................... 534
14.5.6 Receive Data Sampling Timing and Receive Margin in the Asynchronous
Mode..................................................................................................................... 534
14.5.7 Constraints on DMAC/DTC Use.......................................................................... 536
14.5.8 Cautions for Clock Synchronous External Clock Mode....................................... 536
14.5.9 Caution for Clock Synchronous Internal Clock Mode ......................................... 536
Section 15 High Speed A/D Converter (Excluding A Mask)
................................. 537
15.1 Overview............................................................................................................................ 537
15.1.1 Features................................................................................................................. 537
15.1.2 Block Diagram...................................................................................................... 538
15.1.3 Pin Configuration ................................................................................................. 538
15.1.4 Register Configuration ......................................................................................... 539
15.2 Register Descriptions......................................................................................................... 540
15.2.1 A/D Data Registers A–H (ADDRA–ADDRH) .................................................... 540
15.2.2 A/D Control/Status Register (ADCSR) ................................................................ 541
15.2.3 A/D Control Register (ADCR) ............................................................................. 544
15.3 Bus Master Interface .......................................................................................................... 545
15.4 Operation ........................................................................................................................... 548
15.4.1 Select-Single Mode............................................................................................... 548
15.4.2 Select-Scan Mode ................................................................................................. 549
15.4.3 Group-Single Mode .............................................................................................. 550
15.4.4 Group-Scan Mode................................................................................................. 551
15.4.5 Buffer Operation................................................................................................... 552
15.4.6 Simultaneous Sampling Operation ....................................................................... 555
15.4.7 Conversion Start Modes ....................................................................................... 557
15.4.8 Conversion Start by External Input ...................................................................... 560
15.4.9 A/D Conversion Time........................................................................................... 561
15.5 Interrupts ............................................................................................................................ 562
15.6 Notes on Use ...................................................................................................................... 563
Section 16 Mid-Speed A/D Converter (A Mask)
....................................................... 567
16.1 Overview............................................................................................................................ 567
16.1.1 Features................................................................................................................. 567
16.1.2 Block Diagram...................................................................................................... 568
16.1.3 Pin Configuration ................................................................................................. 569