Renesas SH7041 Series, Hardware Manual, Page: 728 / 923

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22.5 Description of Registers
22.5.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for addresses H'00000–H'1FFFF is entered by setting SWE to 1 when FWE
= 1, then setting the EV1 or PV1 bit. Program mode for addresses H'00000–H'1FFFF is entered by
setting SWE to 1 when FWE = 1, then setting the PSU1 bit, and finally setting the P1 bit. Erase
mode for addresses H'00000–H'1FFFF is entered by setting SWE to 1 when FWE = 1, then setting
the ESU1 bit, and finally setting the E1 bit. FLMCR1 is initialized in the standby mode or with
power-on reset. Its initial value is H'80 when a low level is input to the FWP pin, and H'00 when a
high level is input. When on-chip flash memory is disabled, a read will return H'80, and writes are
invalid.
Writes to bits SWE, ESU1, PSU1, EV1, and PV1 are enabled only when FWE = 1 and SWE = 1;
writes to the E1 bit only when FWE = 1, SWE = 1, and ESU1 = 1; and writes to the P1 bit only
when FWE = 1, SWE = 1, and PSU1 = 1.
Bit: 7 6 5 4 3 2 1 0
FWE SWE ESU1 PSU1 EV1 PV1 E1 P1
Initial value: 0 0 0 0 0 0 0 0
R/W: R R/W R/W R/W R/W R/W R/W R/W
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Bit 7—Flash Write Enable Bit (FWE): Displays the state of the FWP pin which sets hardware
protection against flash memory programming/erasing.
Bit 7: FWE Description
0 When high level is input to the FWP pin (hardware-protect state)
1 When low level is input to the FWP pin
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Bit 6—Software Write Enable Bit (SWE): Enables or disables the flash memory. This bit
should be set when setting bits 5–0, FLMCR2 bits 5–0, EBR1 bits 3–0, and EBR2 bits 7–0.
Bit 6: SWE Description
0 Writes disabled (Initial value)
1 Writes enabled
[Setting condition] When FWE=1
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Bit 5—Erase Setup Bit 1 (ESU1): Prepares for a transition to erase mode (applicable
addresses: H'00000–H'1FFFF). Do not set the SWE, PSU1, EV1, PV1, E1, or P1 bit at the
same time.