Renesas SH7041 Series, Hardware Manual, Page: 790 / 923

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Table 25.3 Permitted Output Current Values (Conditions: V
CC
= 5.0 V
±
10%, AV
CC
=
5.0 V
±
10%, AV
CC
= V
CC
±
10%, AV
ref
= 4.5 V to AV
CC
, V
SS
= AV
SS
= 0 V,
Ta = –20 to +75° C)
Item Symbol Min Typ Max Unit
Output low-level permissible current (per pin) I
OL
— — 2.0
*
mA
Output low-level permissible current (total)
∑
I
OL
— — 80 mA
Output high-level permissible current (per pin) –I
OH
— — 2.0 mA
Output high-level permissible current (total)
∑
(–I
OH
) — — 25 mA
Notes: To assure LSI reliability, do not exceed the output values listed in this table.
* PE9, PE11–PE15 are I
OL
= 15 mA (max). Make sure that no more than three of these
pins exceed an I
OL
of 2.0 mA simultaneously.
25.3 AC Characteristics
25.3.1 Clock Timing
Table 25.4 Clock Timing (Conditions: V
CC
= 5.0 V
±
10%, AV
CC
= 5.0 V
±
10%, AV
CC
=
V
CC
±
10%, AV
ref
= 4.5 V to AV
CC
, V
SS
= AV
SS
= 0 V, Ta = –20 to +75° C)
Item Symbol Min Max Unit Figures
Operating frequency f
OP
4 28.7 MHz 25.1
Clock cycle time t
cyc
34.8 250 ns
Clock low-level pulse width t
CL
10 — ns
Clock high-level pulse width t
CH
10 — ns
Clock rise time t
CR
— 5 ns
Clock fall time t
CF
— 5 ns
EXTAL clock input frequency f
EX
4 10 MHz 25.2
EXTAL clock input cycle time t
EXcyc
100 250 ns
EXTAL clock low-level input pulse width t
EXL
40 — ns
EXTAL clock high-level input pulse width t
EXH
40 — ns
EXTAL clock input rise time t
EXR
— 5 ns
EXTAL clock input fall time t
EXF
— 5 ns
Reset oscillation settling time t
OSC1
10 — ms 25.3
Standby return clock settling time t
OSC2
10 — ms