12-24
Limit Testing
2400 Series SourceMeter
®
User’s Manual
Limit test programming example
Diode breakdown voltage test is an example that readily lends itself to pass/fail analysis.
This test verifies the reverse and often the forward voltage at which the device begins to
show a large deviation in current for a small deviation in voltage. The test is performed by
sourcing a specified current level and then measuring the resulting voltage drop. The volt-
age drop is then compared with one set of limits to determine if the diode passes or fails
and should be discarded. Voltage measurements for failing diodes are also compared
against a more restricted range of limits to determine if they should be routed to QA
(Quality Assurance) for further analysis.
Command*
Description*
:CALCulate2:CLIMitis:FAIL:SMLocation <location>
Specify fail source memory location. (Location =
NRf (memory#) or NEXT (next location).
:CALCulate2:CLIMits:BCONtrol <name>
Control I/O port pass/fail update. Name =
IMMediate (at failure) or END (end of sweep).
:CALCulate2:CLIMits:CLEar
Clear test results, reset I/O port.
:CALCulate2:CLIMits:CLEar:AUTO <state>
Enable/disable auto-clear (state = ON or OFF).
:CALCulate2:CLIMits:MODE <name>
Select Digital I/O control mode (name =
GRADing or SORTing).
* LIMitX = LIMit2, LIMit3, LIMit5 through LIMit12. LIMit4 (Contact check option) not shown (see
Table 18-1
and
Appendix F
).
Table 12-2
Commands to control Digital I/O port for limit testing
Command
Description
:SOURce2:BSIZe <n>
:SOURce2:TTL <NRf> | <NDN>
:SOURce2:TTL4:MODE <name>
:SOURce2:TTL4:BSTate <state>
:SOURce2:CLEar
:SOURce2:CLEar:AUTO <state>
:SOURce2:CLEar:AUTO:DELay <n>
Set Digital I/O port bit size (n = 3 or 4).
Set I/O port bit pattern (NRf | NDN = pattern).
Set Digital I/O line 4 mode (name = EOTest or BUSY).
Set BUSY and EOT polarity (HI or LO).
Clear digital output lines.
Enable/disable I/O port auto clear (state = ON or OFF).
Set auto-clear delay (n = delay).
Table 12-1 (continued)
Limit commands
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