GR740-UM-DS, Nov 2017, Version 1.7
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GR740
5.9
Time synchronisation
5.9.1
Overview
The system includes hardware functionality for time synchronization where the system can be config-
ured to save the current time value on certain events. The system also supports toggling GPIO lines on
timer ticks and when the current time value is latched. The event triggering the time latch and GPIO
toggle responses is fully handled in hardware without requiring involvement from software, except
for the need for initial configuration of the peripherals. This section provides an overview of the avail-
able resources, please refer to the documentation of the peripherals for further details.
The following events can trigger time latching:
•
Assertion of any of the interrupt lines, includes CAN controller RX and TX events and also
events signaled via GPIO inputs since the GPIO ports can be configured to generate interrupts.
•
SpaceWire Time-Code reception (signaled via router tick outputs 0 - 3, via SpaceWire router
AMBA port interrupts and via TDP controller)
•
MIL-STD-1553B reception of synchronize mode command (when operating as RT).
The following events can trigger a synchronization message or action:
•
GPIO lines can be toggled on GPTIMER 0 timer ticks and all events that trigger time latching
•
The TDP controller can initiate transmission of SpaceWire Time-Codes
•
MIL-STD-1553B message transmission can be triggered by the timer 3 tick on GPTIMER 0
(when operating as BC)
5.9.2
Available timers
The following timers are available in the system:
•
Processor up-counter - The up-counters accessible via internal registers %ASR22 and %ASR23,
in the processors provide a 56-bit value (see section 6.10.4). All four processors share the same
counter. The low part of this counter is also used for interrupt timestamping, the system’s trace
buffers, and performance counter timestamping.
•
General purpose timer units - Five general purpose timers units (GPTIMER0 - 4) provides 21 32-
bit timers. GPTIMER0 has five timers where the last timer is used as the system watchdog and
GPTIMER1-4 each has four 32-bit timers. All timers units are capable of latching or setting the
time based on events on the interrupt bus or on separate inputs (called external events).
•
The TDP controller provides basic time keeping functions such as Elapsed Time counter accord-
ing to the CCSDS Unsegmented Code specification. It provides support for setting and sampling
the Elapsed Time counter. The Elapsed Time counter can be incremented either using an internal
frequency synthesizer or by using the external ET increment signal (mapped to GPIO[1], only
available in silicon revision 1). The TDP controller also implements the Time Distribution Proto-
col (TDP). The aim of TDP is to distribute and synchronize time across a SpaceWire network.
The TDP controller also provides external datation services, there are four external datation ser-
vices implemented which can latch the elapsed time counter when a specified event occurs. All
external datation services share the same event inputs. The event on which time stamp must
occur is configurable individually (using mask registers) for all the external datation services
