GR740-UM-DS, Nov 2017, Version 1.7
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GR740
11.2.3 Scrubbing
The memory scrubber can be commanded to scrub a certain memory area, by writing a start and end
address to the scrubber’s start/end registers, followed by writing “00” to the scrub mode field and ‘1’
to the scrub enable bit in the scrubber control register.
After starting, the memory scrubber will proceed to read the memory region in bursts. The burst size
is fixed to eight 32-bit words. When a correctable error is detected, the scrubber performs a locked
read-write cycle to correct the error, and then resumes the scrub operation.
If a correctable error detected is in the middle of a burst, the following read in the burst is completed
before the read-write cycle begins. The memory scrubber can handle the special case where that
access also had a correctable error within the same locked scrub cycle.
If an uncorrectable error is detected, that location is left untouched.
Note that the status register functionality is running in parallel with the scrubber, so correctable and
uncorrectable errors will be logged as usual. To prevent double logging, the memory scrubber masks
out the (expected) correctable error arising during the locked correction cycle.
To allow normal access to the bus, the memory scrubber sleeps for a number of cycles between each
burst. The number of cycles can be adjusted in the config register.
If the ID bit is set in the config register, the memory scrubber will interrupt when the complete scrub
is done.
11.2.4 Scrubber error counters
The memory scrubber keeps track of the number of correctable errors detected during the current
scrub run and the number of errors detected during processing of the current “count block”. The size
of the count block is a fixed power of two equal or larger than the burst length (set to eight 32-bit
words).
The memory scrubber can be set up to interrupt when the counters exceed given thresholds. When this
happens, the NE bit, plus one of the SEC/SBC bits, is set in the status register.
11.2.5 External start
If the ES bit is set in the config register, the scrub enable bit is set automatically when the start input
signal goes high. This can be used to set up periodic scrubbing. The start input signal is connected to
the tick output of timer four on the system’s first general purpose timer unit (GPTIMER 0). The tick
output will be high for one clock cycle when the fourth timer underflows.
11.2.6 Memory regeneration
The regeneration mode performs the same basic function as the scrub mode, but is optimised for the
case where many (or all) locations have correctable errors.
In this mode, the whole memory area selected is scrubbed using locked read/write bursts.
If an uncorrectable error is encountered during the read burst, that burst block is processed once again
using the regular scrub routine, and the regeneration mode resumes on the following block. This
avoids overwriting uncorrectable error locations.
11.2.7 Initialization
The scrubber can be used to write a pre-defined pattern to a block of memory. This is often necessary
on EDAC memory before it can be used.
Before running the initialization, the pattern to be written to memory should be written into the scrub-
ber initialization data register. The pattern has the same size as the burst length, so the corresponding
number of writes to the initialization data register must be made.
