GR740-UM-DS, Nov 2017, Version 1.7
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GR740
20
General Purpose Timer Units
20.1
Overview
A General Purpose Timer Unit acts a slave on AMBA APB bus and provides a common prescaler and
decrementing timers. The system has five general purpose timer units (GPTIMER). Each unit imple-
ments one 16-bit prescaler and four or five decrementing timers. The units are capable of asserting
interrupt on timer under flow and the first unit, GPTIMER 0, also provides system watchdog funtion-
ality.
GPTIMER 0 has a separate interrupt line for each timer while GPTIMER units 1 - 4 each use a shared
interrupt for all timers. Several timer units are provided in order to support separated ASMP configu-
rations with potentially shared access to the first timer unit that controls the watchdog system reset.
20.2
Operation
The prescaler is clocked by the system clock and decremented on each clock cycle. When the pres-
caler underflows, it is reloaded from the prescaler reload register and a timer tick is generated.
The operation of each timer within a timer unit is controlled through the timer’s control register. A
timer is enabled by setting the enable bit in the control register. The timer value is then decremented
on each prescaler tick. When a timer underflows, it will automatically be reloaded with the value of
the corresponding timer reload register if the restart bit in the control register is set, otherwise it will
stop at -1 and reset the enable bit.
If the interrupt enable bit for a timer is set, a timer unit will signal an interrupt on the appropriate inter-
rupt line when the timer underflow. The interrupt pending bit in the control register of the underflown
timer will be set and remain set until cleared by writing ‘1’. The first timer unit has a separate inter-
rupt line for each timer. The other timer units each use a shared interrupt line for all timers in a unit.
To minimize complexity, timers share the same decrementer. This means that the minimum allowed
prescaler division factor is
ntimers
+1 (reload register =
ntimers
) where
ntimers
is the number of
implemented timers (five for GPTIMER 0 and four for GPTIMER 1 - 4). By setting the chain bit in
the control register timer
n
can be chained with preceding timer
n
-1. Timer
n
will be decremented
each time when timer
n
-1 underflows.
Each timer can be reloaded with the value in its reload register at any time by writing a ‘one’ to the
load bit in the control register. The last timer on GPTIMER 0 acts as a watchdog, driving the watch-
dog output signal WDOGN when expired.
timer n reload
Figure 35.
General Purpose Timer Unit block diagram
prescaler reload
-1
prescaler value
timer 1 value
timer 2 value
timer n value
timer 1 reload
timer 2 reload
-1
tick
pirq
pirq+1
pirqn+(n-1)
