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Interrupt Control Instructions
Section 3-20
■
Resetting and Starting Scheduled Interrupts (CJ1M CPU Units Only)
Operand Specifications
Operand
Contents
N
Specify the scheduled interrupt number.
14: Scheduled interrupt 0 (interrupt task 2)
15: Scheduled interrupt 1 (interrupt task 3)
Note
Only scheduled interrupt 0 can be used with the CJ1M-CPU11/21.
C
Scheduled interrupt
time units (Set in the
PLC Setup.)
Scheduled interrupt set time
Any time unit setting
0 decimal (0000 hex):
Disable interrupt. (Stop internal timer.)
10 ms
1 to 9,999 decimal (0001 to 270F hex):
Enable interrupt. (Reset internal timer value, and
then start the timer with an interrupt interval
between 10 and 99,990 ms.)
1 ms
1 to 9,999 decimal (0001 to 270F hex):
Enable interrupt. (Reset internal timer value, and
then start timer with an interrupt interval
between 1 and 9,999 ms.)
0.1 ms
5 to 9,999 decimal (0005 to 270F hex):
Enable interrupt. (Reset internal timer value, and
then start timer with interrupt interval between
0.5 and 999.9 ms.)
Note
Settings 0001 to 0004 cannot be used. An error
will occur if one of these settings is used.
Area
N
S
CIO Area
---
CIO 0000 to CIO 6143
Work Area
---
W000 to W511
Holding Bit Area
---
H000 to H511
Auxiliary Bit Area
---
A000 to A959
Timer Area
---
T0000 to T4095
Counter Area
---
C0000 to C4095
DM Area
---
D00000 to D32767
EM Area without bank
---
E00000 to E32767
EM Area with bank
---
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
---
@ D00000 to @ 32767
@ E00000 to @ 32767
@ En_00000 to
@ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
---
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
Specified values only
Data Registers
---
DR0 to DR15
Содержание SYSMAC CS1D-CPU**
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
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