![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_742268877.webp)
838
Interrupt Control Instructions
Section 3-20
interrupt task longer than 10 ms is executed during I/O refreshing with the
Special I/O Unit or Slave Rack, a non-fatal will occur and the Interrupt Task
Error Flag (A40213) will be turned ON.
Interrupts have different priority levels. A power OFF interrupt is given the
highest priority, followed by I/O interrupts, external interrupts, and finally
scheduled interrupts. Lower numbered I/O interrupts are given priority over a
higher numbered I/O interrupts.
Precautions for I/O Interrupts
Only interrupt inputs from regular CS/CJ-series Interrupt Input Units and
C200H Interrupt Input Units are supported for interrupt tasks. Interrupt inputs
from Inner Boards and Special I/O Units are not supported.
Mount the Interrupt Input Unit in the CPU Rack. If a CJ1-H CPU Unit is being
used, mount the Unit in slots 0 to 4, and if a CJ1M CPU Unit is being used,
slots 0 to 2. It will not be possible to start the I/O interrupt task unless the
Interrupt Input Unit is mounted in one of these slots.
Words are allocated to Interrupt Input Units in the order that they are mounted
from left to right.
All interrupt inputs that have been detected will be cleared when the interrupt
mask is cleared.
The CS1W-INT01 and the C200HS-INT01 cannot be used at the same time.
There is no limit on the number of I/O interrupt inputs that can be recorded,
but only one interrupt is recorded for each I/O interrupt number. Furthermore,
the recorded interrupt is not cleared until its interrupt task has been com-
pleted, so a new interrupt input will be ignored if it is received while its inter-
rupt task is being executed.
Precautions for Scheduled Interrupts
Be sure that the time interval is longer than the time required to execute the
scheduled interrupt task.
For scheduled interrupts, MSKS(690) is used only to set the scheduled inter-
rupt interval and does not set the time to the first scheduled interrupt. To accu-
rately control the time to the first interrupt and the interrupt interval, program
CLI(691) to set the time to the first schedule interrupt just before programming
MSKS(690). If MSKS(690) is used to restart a schedule interrupt for a CJ1M
CPU Unit, however, the time to the first scheduled interrupt will be accurate
even if CLI(691) is not used.
The time unit for the scheduled interrupt is set in the PLC Setup as the Sched-
uled Interrupt Interval.
Related Memory Area
Words
Name
Address
Operation
Maximum Interrupt
Task Processing
Time
A440
The maximum processing time for an interrupt
task is stored in binary data in 0.1-ms units and is
cleared at the start of operation.
Interrupt Task with
Maximum Process-
ing Time
A441
The interrupt task number with maximum pro-
cessing time is stored in binary data. Here, 8000
to 80FF Hex correspond to task numbers 00 to
FF Hex.
A44115 will turn ON when the first interrupt
occurs after the start of operation. The maximum
processing time for subsequent interrupt tasks
will be stored in the rightmost two digits in hexa-
decimal and will be cleared at the start of opera-
tion.
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
Страница 29: ...xxx...
Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...