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662
Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only)
Section 3-16
Description
DBL(843) converts the 16-bit signed binary value in S to double-precision (64-
bit) floating-point data (IEEE754-format) and places the result in words D to
D+3. A single 0 is added after the decimal point in the floating-point result.
Only values within the range of –32,768 to 32,767 can be specified for S. To
convert signed binary data outside of that range, use DBLL(844).
Example conversions:
A signed binary value of 3 is converted to 3.0.
A signed binary value of –3 is converted to –3.0.
Flags
Precautions
The content of S must contain signed binary data with a (decimal) value in the
range of –32,768 to 32,767.
3-16-4 32-BIT TO DOUBLE FLOATING: DBLL(844)
Purpose
Converts a 32-bit signed binary value to double-precision (64-bit) floating-
point data and places the result in the specified destination words.
This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units
only.
Ladder Symbol
Variations
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
S
D
D+1CH
SCH
DCH
D+2CH
D+3CH
Floating-point data (64 bits)
Signed binary data (16 bits)
Name
Label
Operation
Error Flag
ER
OFF
Equals Flag
=
ON if both the exponent and mantissa of the result are 0.
OFF in all other cases.
Negative Flag
N
ON if the result is negative.
OFF in all other cases.
DBLL(844)
S
D
S
: First source word
D
: First destination word
Variations
Executed Each Cycle for ON Condition
DBLL(844)
Executed Once for Upward Differentiation
@DBLL(844)
Executed Once for Downward Differentiation
Not supported.
Immediate Refreshing Specification
Not supported.
Содержание SYSMAC CS1D-CPU**
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
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Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
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