![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_7422681164.webp)
1125
Clock Instructions
Section 3-28
R through R+2: Result Data
R through R+2 contain the result of the addition. R through R+2 must be in the
same data area.
Operand Specifications
15
8
0
7
R
15
8
0
7
R+1
15
8
0
7
R+2
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
Hour: 00 to 23 (BCD)
Day: 01 to 31 (BCD)
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
Area
C
T
R
CIO Area
CIO 0000 to
CIO 6141
CIO 0000 to
CIO 6142
CIO 0000 to
CIO 6141
Work Area
W000 to W509
W000 to W510
W000 to W509
Holding Bit Area
H000 to H509
H000 to H510
H000 to H509
Auxiliary Bit Area
A000 to A957
A000 to A958
A448 to A957
Timer Area
T0000 to T4093
T0000 to T4094
T0000 to T4093
Counter Area
C0000 to C4093
C0000 to C4094
C0000 to C4093
DM Area
D00000 to
D32765
D00000 to
D32766
D00000 to
D32765
EM Area without bank
E00000 to
E32765
E00000 to
E32766
E00000 to
E32765
EM Area with bank
En_00000 to
En_32765
(n = 0 to C)
En_00000 to
En_32766
(n = 0 to C)
En_00000 to
3En_2765
(n = 0 to C)
Indirect DM/EM
addresses in binary
@D00000 to @D32767
@E00000 to @E32767
@En_00000 to @En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
Specified values
only
---
Data Registers
---
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
Страница 29: ...xxx...
Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...