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759
Data Control Instructions
Section 3-18
Operand Specifications
Description
When the execution condition is ON, PID(190) carries out target value filtered
PID control with two degrees of freedom according to the parameters desig-
nated by C (set value, PID constant, etc.). It takes the specified input range of
binary data from the contents of input word S and carries out the PID action
according to the parameters that are set. The result is then stored as the
manipulated variable in output word D.
The parameters are obtained when the execution condition turns from OFF to
ON, and the Error Flag will turn ON if the settings are outside of the permissi-
ble range.
If the settings are within the permissible range, PID processing will be exe-
cuted using the initial values. Bumpless operation is not performed at this
time. It will be used for manipulated variables in subsequent PID processing
execution. (Bumpless operation is processing that gradually and continuously
changes the manipulated variable in order to avoid the adverse effects of sud-
den changes.)
When the execution condition turns ON, the PV for the specified sampling
period is entered and processing is performed.
Area
S
C
D
CIO Area
CIO 0000 to CIO
6143
CIO 0000 to
CIO 6105
CIO 0000 to CIO
6143
Work Area
W000 to W511
W000 to W473
W000 to W511
Holding Bit Area
H000 to H511
H000 to H473
H000 to H511
Auxiliary Bit Area
A000 to A959
A000 to A921
A448 to A959
Timer Area
T0000 to T4095
T0000 to T4057
T0000 to T4095
Counter Area
C0000 to C4095
C0000 to C4057
C0000 to C4095
DM Area
D00000 to
D32767
D00000 to
D32729
D00000 to
D32767
EM Area without bank
E00000 to
E32767
E00000 to
E32729
E00000 to
E32767
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to
En_32729
(n = 0 to C)
En_00000 to
En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
DR0 to DR15
---
DR0 to DR15
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...