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170
Sequence Input Instructions
Section 3-3
Description
OR is used for a normally open bit connected in parallel. A normally open bit
is configured to form a logical OR with a logic block beginning with a LOAD or
LOAD NOT instruction (connected to the bus bar or at the beginning of the
logic block). If there is no immediate refreshing specification, the specified bit
in I/O memory is read. If there is an immediate refreshing specification, the
status of the Basic Input Unit’s input terminal is read.
Flags
There are no flags affected by this instruction.
Precautions
Differentiate up (@) or differentiate down (%) can be specified for OR. If differ-
entiate up (@) is specified, the execution condition is turned ON for one cycle
only after the status of the operand bit goes from OFF to ON. If differentiate
down (%) is specified, the execution condition is turned ON for one cycle only
after the status of the operand bit goes from ON to OFF.
Immediate refreshing (!) can be specified for OR. An immediate refresh
instruction updates the status of the input bit just before the instruction is exe-
cuted from the Basic Input Unit (but not for Basic Input Units on Slave Racks
or for C200H Group 2 Multi-point Input Units).
For OR, it is possible to combine immediate refreshing and up or down differ-
entiation (!@ or !%). If either of these is specified, the input is refreshed from
the Basic Input Unit just before the instruction is executed and the execution
condition is turned ON for one cycle only after the status of the operand bit
goes from OFF to ON, or from ON to OFF.
Example
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
OR bit operand
Instruction
Operand
LD
000000
AND
000001
AND
000002
OR
000003
AND
000004
LD
000005
AND
000006
OR NOT
000007
AND LD
---
OUT
000008
Содержание SYSMAC CS1D-CPU**
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
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