![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_742268534.webp)
495
Conversion Instructions
Section 3-12
Description
NEGL(161) calculates the 2’s complement of S+1 and S and writes the result
to R+1 and R. The 2’s complement calculation basically reverses the status of
the bits in S+1 and S and adds 1.
Note
This operation (reversing the status of the bits and adding 1) is equivalent to
subtracting the content of S+1 and S from 0000 0000.
Flags
Note
The result for 8000 hex will be 8000 hex.
Example
When CIO 000000 is ON in the following example, NEGL(161) calculates the
2’s complement of the content of D00101 and D00100 and writes the result to
D00201 and D00200.
3-12-7 16-BIT TO 32-BIT SIGNED BINARY: SIGN(600)
Purpose
Expands a 16-bit signed binary value to its 32-bit equivalent.
Ladder Symbol
Variations
(S+1, S)
(R+1, R)
2's complement
(Comp 1)
Name
Label
Operation
Error Flag
ER
OFF
Equals Flag
=
ON if the result is 0000 0000.
OFF in all other cases.
Negative Flag
N
ON if bit 15 of R+1 is ON.
OFF in all other cases.
−
)
Add 1
Actual
calculation
Equivalent
subtraction
Reverse bit status
SIGN(600)
S
R
S
: Source word
R
: First result word
Variations
Executed Each Cycle for ON Condition
SIGN(600)
Executed Once for Upward Differentiation
@SIGN(600)
Executed Once for Downward Differentiation
Not supported
Immediate Refreshing Specification
Not supported
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
Страница 29: ...xxx...
Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...