![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_742268932.webp)
893
High-speed Counter/Pulse Output Instructions
Section 3-21
Description
PLS2(887) starts pulse output on the port specified in P using the mode spec-
ified in M at the start frequency specified in F (1 in diagram). The frequency is
increased every pulse control period (4 ms) at the acceleration rate specified
in S until the target frequency specified in S is reached (2 in diagram). When
the target frequency has been reached, acceleration is stopped and pulse
output continues at a constant speed (3 in diagram).
The deceleration point is calculated from the number of output pulses and
deceleration rate set in S and when that point is reached, the frequency is
decreased every pulse control period (4 ms) at the deceleration rate specified
in S until the starting frequency specified in S is reached, at which point pulse
output is stopped (4 in diagram).
Pulse output is started each time PLS2(887) is executed. It is thus normally
sufficient to use the differentiated version (@PLS2(887)) of the instruction or
an execution condition that is turned ON only for one scan.
PLS2(887) can be used only for positioning.
With the CJ1M CPU Units, PLS2(887) can be executed during pulse output
for ACC(888) in either independent or continuous mode, and during accelera-
tion, constant speed, or deceleration. (See note.) ACC(888) can also be exe-
cuted during pulse output for PLS2(887) during acceleration, constant speed,
or deceleration.
Note
Executing PLS2(887) during speed control with ACC(888) (continuous mode)
with the same target frequency as ACC(888) can be used to achieve interrupt
feeding of a fixed distance. Acceleration will not be performed by PLS2(887)
for this application, but if the acceleration rate is set to 0, the Error Flag will
turn ON and PLS2(887) will not be executed. Always set the acceleration rate
to a value other than 0.
Index Registers
---
---
---
---
Indirect addressing
using Index Registers
---
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to
–2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
,IR0 to ,IR15
–2048 to +2047 ,IR0 to
–2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
P
M
S
F
A
B
C
D
Target frequency
Starting frequency
Time
PLS2(887) executed.
Pulse frequency
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
Страница 29: ...xxx...
Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...