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780
Data Control Instructions
Section 3-18
3-18-3 LIMIT CONTROL: LMT(680)
Purpose
Controls output data according to whether or not input data is within upper
and lower limits.
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
LMT(680)
S
C
D
S
: Input word
C
: First limit word
D
: Output word
Variations
Executed Each Cycle for ON Condition
LMT(680)
Executed Once for Upward Differentiation
@LMT(680)
Executed Once for Downward Differentiation
Not supported.
Immediate Refreshing Specification
Not supported.
Block program areas
Step program areas
Subroutines
Interrupt tasks
OK
OK
OK
OK
Area
S
C
D
CIO Area
CIO 0000 to
CIO 6143
CIO 0000 to
CIO 6142
CIO 0000 to
CIO 6143
Work Area
W000 to W511
W000 to W510
W000 to W511
Holding Bit Area
H000 to H511
H000 to H510
H000 to H511
Auxiliary Bit Area
A000 to 959
A000 to A958
A448 to A959
Timer Area
T0000 to T4095
T0000 to T4094
T0000 to T4095
Counter Area
C0000 to C4095
C0000 to C4094
C0000 to C4095
DM Area
D00000 to
D32767
D00000 to
D32766
D00000 to
D32767
EM Area without bank
E00000 to
E32767
E00000 to
E32766
E00000 to
E32767
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to
En_32766
(n = 0 to C)
En_00000 to
En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
#0000 to #FFFF
(binary)
---
Data Registers
DR0 to DR15
---
DR0 to DR15
Содержание SYSMAC CS1D-CPU**
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...