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250
Timer and Counter Instructions
Section 3-6
3-6-2
TEN-MS TIMER: TIMH(015)/TIMHX(551)
Purpose
TIMH(015)/TIMHX(551) operates a decrementing timer with units of 10-ms.
The setting range for the set value (SV) is 0 to 99.99 s for TIMH(015) and 0 to
655.35 s for TIMHX(551). The timer accuracy is 0 to 0.01 s.
Note
The timer accuracy for CS1D CPU Units is 10 ms + the cycle time
Ladder Symbol
Variations
Applicable Program Areas
Operands
N: Timer Number
The timer number must be between 0000 and 4095 (decimal).
S: Set Value
The set value must be between #0000 and 9999 in BCD mode.
CIO 000000
T0000
T0000
&0100
or
Timer input
Timer PV
Timer
Completion
Flag
PV
refresh
method
Symbol
Operands
BCD
N: 0000 to 4095 (decimal)
S: #0000 to #9999 (BCD)
Binary
N: 00000 to 4095 (decimal)
S: &0 to &65535 (decimal)
#0000 to #FFFF (hex)
TIMH(015)
N
S
N
: Timer number
S
: Set value
TIMHX(551)
N
S
N
: Timer number
S
: Set value
Variations
Executed Each Cycle for ON Condition
TIMH(015)/
TIMHX(551)
Executed Once for Upward Differentiation
Not supported.
Executed Once for Downward Differentiation
Not supported.
Immediate Refreshing Specification
Not supported.
Block program areas
Step program areas
Subroutines
Interrupt tasks
Not allowed
OK
OK
Not allowed
Содержание SYSMAC CS1D-CPU**
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
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