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189
Sequence Output Instructions
Section 3-4
Variations
Note
Immediate refreshing is not supported by CS1D CPU Units.
Applicable Program Areas
Operand Specifications
Description
When S turns ON, the designated bit will go ON and stay ON until reset,
regardless of whether S stays ON or goes OFF. When R turns ON, the desig-
nated bit will go OFF. The relationship between execution conditions and
KEEP(011) bit status is shown below.
Variations
Executed Each Cycle for ON Condition
KEEP(011)
Executed Once for Upward Differentiation
Not supported
Executed Once for Downward Differentiation
Not supported
Immediate Refreshing Specification (See note.)
!KEEP(011)
Block program areas
Step program areas
Subroutines
Interrupt tasks
Not allowed
OK
OK
OK
Area
B
CIO Area
CIO 000000 to CIO 614315
Work Area
W00000 to W51115
Holding Bit Area
H00000 to H51115
Auxiliary Bit Area
A44800 to A95915
Timer Area
---
Counter Area
---
DM Area
---
EM Area without bank
---
EM Area with bank
---
Indirect DM/EM
addresses in binary
---
Indirect DM/EM
addresses in BCD
---
Constants
---
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
Set
Reset
Содержание SYSMAC CS1D-CPU**
Страница 3: ...iv...
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Страница 185: ...146 List of Instructions by Function Code Section 2 4...
Страница 193: ...154 3 35 4 MOVE BIT MOVBC 568 1274 3 35 5 BIT COUNTER BCNTC 621 1276 3 35 6 GET VARIABLE ID GETID 286 1278...
Страница 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Страница 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Страница 1391: ...1352 ASCII Code Table Appendix A...