21 DEVICES
21.8 Index Register (Z/LZ)
355
21
Combination of index modification
This section describes the combination of index modification.
Modification order for the device specification and index modification
According to the priority order shown below, the device specification (digit specification, bit specification, indirect specification)
and index modification can be applied. However, some word devices may not follow the priority order shown below.
Specification method combined with device specification
The device targeted for specification is modified in order of: 1st modification, 2nd modification and then 3rd modification.
Besides, the following contents can be used only for the device for which the 1st modification can be applied. (For example,
index modifi digit specification is impossible for the function input (FX).)
Precautions
This section describes the precautions on using index modification.
Index modification between the FOR and NEXT instructions
Between the FOR instruction and the NEXT instruction, pulse output is provided through the edge relay (V). However, pulse
output by the PLS, PLF, or pulse conversion (
P) instruction is not available (
Index modification by the CALL instruction
In the CALL instruction, pulse output is provided through the edge relay (V). However, pulse output by the PLS, PLF, or pulse
conversion (
P) instruction is not available (
Device range check for index modification
For details on the device range check when index modification is performed, refer to the following.
MELSEC iQ-R Programming Manual (CPU Module Instructions, Standard Functions/Function Blocks)
Order of priority
When the device targeted for the device specification
and index modification is the bit device
When the device targeted for the device specification
and index modification is the word device
High
Low
1: Index modification
2: Digit specification
1: Index modification
2: Indirect specification
3: Bit specification
Device targeted for
specification
1st modification
2nd modification
3rd modification
Example
Bit device
Index modification
Digit specification
K4M100Z2
Word device
Index modification
Bit specification
D10Z2.0
Index modification
Indirect Specification
@D10Z2
Bit specification
Index modification
D10.8Z2
Indirect Specification
Bit specification
@D10.8
Index modification
Indirect Specification
Bit specification
@D10Z2.8
Indirect Specification
Bit specification
Index modification
@D10.8Z2
Содержание MELSEC iQ-R-R00CPU
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Страница 151: ...9 MONITOR FUNCTION 9 1 Real Time Monitor Function 149 9 MEMO ...
Страница 323: ...18 SEQUENCE SCAN SYNCHRONIZATION SAMPLING FUNCTION 321 18 MEMO ...
Страница 330: ...328 20 ROUTING SETTING 20 3 Precautions MEMO ...
Страница 423: ...26 BASIC CONCEPT 26 8 State Transition of the Redundant System 421 26 MEMO ...
Страница 524: ...522 30 MAINTENANCE AND INSPECTION FOR A REDUNDANT SYSTEM 30 1 Module Replacement in the Redundant System MEMO ...
Страница 1009: ...APPX Appendix 14 List of Available SQL Commands for CPU Module Database Access Function 1007 A MEMO ...
Страница 1014: ...1012 APPX Appendix 15 Added and Enhanced Functions MEMO ...
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