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16 MULTIPLE CPU SYSTEM FUNCTION
16.4 Data Communication Between CPU Modules
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Avoidance of 64-bit data inconsistency
To avoid 64-bit data inconsistency, access the CPU buffer memory by specifying the start address as a multiple of four
similarly to the device to be specified.
(1) The CPU module assures a 64-bit data integrity and write the data to the CPU buffer memory. (TO U3E0 K2052 D0 K4)
(2) The CPU module assures a 64-bit data integrity and write the data to the CPU buffer memory. (TO U3E0 K2056 D4 K4)
(3) The CPU module assures a 64-bit data integrity and read the data from the CPU buffer memory. (FROM U3E0 K2052 D100 K4)
(4) The CPU module assures a 64-bit data integrity and read the data from the CPU buffer memory. (FROM U3E0 K2056 D104 K4)
D4
D0
G2048
G2052
G2056
D104
D100
(1)
(2)
(3)
(4)
Device
4 words (64 bits)
4 words (64 bits)
4 words (64 bits)
4 words (64 bits)
Device
CPU buffer memory
CPU No.1
CPU No.2
Содержание MELSEC iQ-R-R00CPU
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Страница 151: ...9 MONITOR FUNCTION 9 1 Real Time Monitor Function 149 9 MEMO ...
Страница 323: ...18 SEQUENCE SCAN SYNCHRONIZATION SAMPLING FUNCTION 321 18 MEMO ...
Страница 330: ...328 20 ROUTING SETTING 20 3 Precautions MEMO ...
Страница 423: ...26 BASIC CONCEPT 26 8 State Transition of the Redundant System 421 26 MEMO ...
Страница 524: ...522 30 MAINTENANCE AND INSPECTION FOR A REDUNDANT SYSTEM 30 1 Module Replacement in the Redundant System MEMO ...
Страница 1009: ...APPX Appendix 14 List of Available SQL Commands for CPU Module Database Access Function 1007 A MEMO ...
Страница 1014: ...1012 APPX Appendix 15 Added and Enhanced Functions MEMO ...
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