March 2000 © TOSHIBA TEC
7-37
DP120F/DP125F Circuit Description
This machine is equipped with power save functions to control the power consumption by
cutting off the power of the circuits not used while in the standby state. For the power save
functions, there are the printer power save function to cut off only the supply of power to the
fuser and the super power save function to cut off the supply of power to any circuits other than
the minimum required.
(For the printer power save function, refer to "3. 4 Fuser Control Circuit" in this chapter.)
Consisting of the Sub-CPU (IC37) as the central component, the super power save circuit cuts
off the supply of 24VSW (+24V), ±12V, and +5V to other than the super power save circuit
when the facsimile machine has been in the standby state for a fixed time (auto power save
mode) or the power save key has been pressed (manual power save mode), thereby greatly
reducing the power consumption.
Depending on the PWB No. of the Main PBA, the circuit configuration of the super power save
circuit is different.
The PWB No. is indicated on the left center of the component side of the board.
If the PWB No. is HBJB0008405, refer to Fig.7-3-6-1.
If the PWB No. is HBJB0008406 or HBJB0008407, refer to Fig.7-3-6-2.
3.6.1 Initial Operation
When the main power is turned on, 5VPS is delivered from the LVPS allowing the Sub-CPU to
be placed in the operating state. After power on resetting, the Sub-CPU performs initialization
causing the PWSV signal to go HIGH. This allows the power supply voltages of 24V, ±12V, and
+5V to be delivered to the entire system from the LVPS.
When the I/OP-2 GA (IC48) is placed in the operating state and the PWRSVACK signal and
PWRSVNACK go HIGH, the Sub-CPU causes the PWRSVDI signal to be LOW to enable the
port.
3.6.2 Auto Power Save Mode
To use the Auto Power Save Mode, set the Super Power Save Mode setting to Auto.
When the machine is placed in the standby state, the I/OP-2 GA causes the LEDBLK signal to
go LOW and outputs it to the Sub-CPU. Upon receipt the LEDBLK signal, the Sub-CPU makes
the PWRSVLED signal to go LOW to light the power save LED installed on the Operation panel
PBA and activate the super power save reserved state.
When a fixed time has elapsed in the super power save reserved state, the I/OP-2 GA causes
the PWRSVACK signal to go HIGH and outputs it to the Sub-CPU. The Sub-CPU causes the
PWSV signal to go LOW to cut off the supply of power to other than the super power save
circuit. This allows the machine to be placed in the super power save mode to light the power
save LED.
Summary of Contents for DP120F
Page 1: ...PLAINPAPERFACSIMILE File No 31200001 R0112216901 TTEC ...
Page 401: ...DP120F DP125F Circuit Description 7 92 March 2000 TOSHIBA TEC 07 05 00 Fig 7 5 1 ...
Page 656: ...DP120F DP125F Troubleshooting 11 44 March 2000 TOSHIBA TEC ...
Page 700: ...DP120F DP125F Appendix 12 2 March 2000 TOSHIBA TEC 1 2 Error Count List ...
Page 701: ...March 2000 TOSHIBA TEC 12 3 DP120F DP125F Appendix 1 3 Function List for Maintenance ...
Page 702: ...DP120F DP125F Appendix 12 4 March 2000 TOSHIBA TEC 1 4 Drum Unit ...
Page 703: ...March 2000 TOSHIBA TEC 12 5 DP120F DP125F Appendix 1 5 Memory Dump List ...
Page 706: ...SHUWA SHIBA PARK BLDG A 2 4 1 SHIBA KOEN MINATO KU TOKYO 105 8524 JAPAN ...