Toshiba DP120F, Service Manual

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March 2000 © TOSHIBA TEC 7-67 DP120F/DP125F Circuit Description
• PTC GA Signal Table (7/7)
No. Signal Name Type Functions
207 X32M I System clock input (32.0000MHz)
209-211 CD0-2AKX I CODEC DMA interface 0-2 signals (active-low)
DMAC GA (IC16) enables DMA transfer with CODEC
(IC51).
212 PTCDAX I PTC DMA acknowledge signal
DMAC GA enables DMA transfe.
213 DSCDAK I DSC DMA acknowledge signal
DMAC GA enables DMA transfer with DSC (IC59).
214 PCIDAK I PC I/F DMA acknowledge signal
DMAC GA enables DMA transfer with the PC inter-
face.
215 DMADE I DMA data enable signal
Indicates that DMAC GA is to perform DMA transfer.
217 MTINT O Motor interrupt signal
Outputs the motor interrupt signal to DMAC GA.
(Interrupt level 6)
218 DLEINT O DLE interrupt signal
Outputs the interrupt signal of the PC interface to
DMAC GA.
(Interrupt level 3)
219 INT1284 O 1284 interrupt signal
Outputs the interrupt signal of the PC interface to
DMAC GA.
(Interrupt level 3)
221 LDSX I Lower data strobe signal (active-low)
Causes the lower data bus data to be latched.
222 UDSX I Upper data strobe signal (active-low)
Causes the upper data bus data to be latched.
225-230 A1-7 I Address bus
I: Input O: Output I/O: Bidirectional