ISD91200 Series Technical Reference Manual
Release Date: Sep 16, 2019
- 380 -
Revision 2.4
7.1.6
ADC Register Description
SD ADC FIFO Data Register(SDADC_DAT)
Register
Offset
R/W Description
Reset Value
SDADC_DAT
S0x00
R
SD ADC FIFO Data Read Register
0xxxxx_xxxx
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
RESULT[15:8]
7
6
5
4
3
2
1
0
RESULT[7:0]
Bits
Description
[15:0]
RESULT
Delta-Sigma ADC DATA FIFO Read
A read of this register will read data from the audio FIFO and increment the read
pointer. A read past empty will repeat the last data. Can be used with
SDADC_FIFOSTS.THIF to determine if valid data is present in FIFO.