ISD91200 Series Technical Reference Manual
Release Date: Sep 16, 2019
- 155 -
Revision 2.4
5.6.3
Data Transfer Flow in Five Operating Modes
The five operating modes are: Master/Transmitter, Master/Receiver, Slave/Transmitter, Slave/Receiver
and GC Call. Bits STA, STO and AA in I2C_CTL register will determine the next state of the SIO
hardware after SI flag is cleared. Upon completion of the new action, a new status code will be updated
and the SI flag will be set. If the I2C interrupt control bit INTEN (I2C_CTL[7]) is set, appropriate action
or software branch of the new status code can be performed in the Interrupt service routine.
Data transfers in each mode are shown in the following figures.
*** Legend for the following five figures:
08H
A S TART ha s be e n
tra ns m itte d .
(S TA,S TO ,S I,AA)=(0,0,0,X)
S LA+W will be tra ns m itte d ;
ACK bit will be re ce ive d .
18H
S LA+W ha s be e n tra ns m itte d ;
ACK ha s be e n re ce ive d .
La s t s ta te
La s t a ction is done
Ne xt s e tting in I2CON
Expe cte d ne xt a ction
ne xt a ction is done
Ne w s ta te
S oftwa re 's a cce s s to I2DAT with re s pe ct to "Expe cte d ne xt a ction ":
S oftwa re s hould loa d the da ta byte (to be tra ns mitte d )
into I2DAT be fore ne w I2CON s e tting is done .
(1) Da ta byte will be tra ns mitte d :
(2) S LA+W (R) will be tra ns mitte d :
S oftwa re s hould loa d the S LA+W/R (to be tra ns mitte d )
into I2DAT be fore ne w I2CON s e tting is done .
(3) Da ta byte will be re ce ive d :
S oftwa re ca n re a d the re ce ive d da ta byte from I2DAT
while a ne w s ta te is e nte re d .
Figure 5-16 Legend for the following four figures
