ISD91200 Series Technical Reference Manual
Release Date: Sep 16, 2019
- 138 -
Revision 2.4
GPIO Port [A/B] Data Output Value (Px_DOUT)
Register
Offset
R/W
Description
Reset Value
PA_DOUT
0x008 R/W
GPIO Port A Data Output Value
0x0000_FFFF
PB_DOUT
0x048 R/W
GPIO Port B Data Output Value
0x0000_FFFF
Table 5-51 GPIO Data Output Register (Px_DOUT)
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
DOUT[15:8]
7
6
5
4
3
2
1
0
DOUT[7:0]
Bits
Description
[31:16]
Reserved
Reserved.
[15:0]
DOUT
Px Pin[n] Output Value
Each of these bits controls the status of a GPIO pin when the GPIO pin is configured
as output, open-drain or quasi-bidirectional mode.
1 = GPIO port [A/B] Pin[n] will drive High if the corresponding output mode bit is set.
0 = GPIO port [A/B] Pin[n] will drive Low if the corresponding output mode bit is set.