UG0331 User Guide Revision 15.0
xvi
HPDMA Transfers Data Between DDR Memory and MSS Internal Memory . . . . . . . . . . . . . . . . 243
HPDMA Transfers Data Between SDR Memory and MSS Internal Memory . . . . . . . . . . . . . . . . 243
Block Diagram for Connections between USB Controller and ULPI PHY through MSS . . . . . . . 288
Block Diagram for Connections Between USB Controller and UTMI PHY through FPGA Fabric 290
Basic USB Flow Diagram when USB Controller is in USB Device/Peripheral Mode . . . . . . . . . . 293
SECDED Configurator with Ethernet TX RAM and Ethernet RX RAM Configuration Options . . . 389
Figure 171