Cortex-M3 Processor Overview and Debug Features
UG0331 User Guide Revision 15.0
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DO: SWO (output pin for SWV, refer to the next section).
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SWV: It provides real-time data trace information from various sources within the Cortex-M3
processor device. This is output via the single serial wire output (SWO) pin while your system
processor continues running at full speed. SWV can only be used with the SWD interface.
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ETM: The embedded trace macrocell provides high bandwidth instruction trace via four dedicated
trace pins.
2.5.2
Cortex-M3 Processor Trace System
The debug system of the Cortex-M3 processor is based on the CoreSight architecture. The
CoreSight-based designs enable the memory and peripheral registers to be examined even when the
CPU is running. It also includes several trace capabilities:
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Data trace, generating events to record data reads/writes, exceptions/interrupts, and PC (program
counter) sampling information.
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Software trace, supporting output of debug messages (for example, printf) to the host.
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Instruction trace, collecting a sequence of every executed instruction continuously for a selected
portion of your application.
Trace data can be useful for debugging issues and collecting statistics:
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Locating errors that have irregular symptoms
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Analyzing dynamic system behavior
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Optimizing performance bottlenecks
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Counting code coverage statistics
Trace results are generated in the form of packets, which can be of various lengths. The trace
components transfer the packets using the advanced trace bus (ATB) to the TPIU, which formats the
packets into the trace interface protocol (TIP). The data is then captured by an external trace capture
device such as a trace port analyzer (TPA).
The main components of the Cortex-M3 processor that can be a trace source:
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DWT, for data trace
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ITM, for software trace
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ETM, for full instruction trace
DWT, ITM, and ETM generate trace data in the form of packets and transfer them through the ATB to the
TPIU.
The TPIU has two operation modes:
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Clocked mode, using up to 4-bit (1-, 2- or 4-bit) parallel data outputs
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SWV mode, using the single-bit SWO format. Instruction trace from ETM must use the parallel trace
port, while packets of data trace and software trace normally use SWO (called SWO trace) but can
also be multiplexed with the ETM trace stream through the parallel trace port.