RTC System
UG0331 User Guide Revision 15.0
612
18.4.6
Alarm and Compare Registers
These registers may be written when the RTC is running, but the Alarm must be disabled; the control
register bit 2 reads as a '0'.
Refer to
page 609 for register bit allocation.
The Alarm setting must be set such that the ALARM*PRESCALER is greater than the 8 RTC clock
cycles, assuming that the CPU writes to the control register to clear a wakeup condition within two RTC
clock periods. Since the prescaler value should be set to achieve a 1 Hz pulse and the slowest RTCCLK
source is 32 KHz, this requirement is always true.
18.4.7
Date and Time Registers
These registers may be written when the RTC is running. After writing these registers, the control register
upload bit is used to upload the value coherently into the RTC counter.
Table 610 •
Alarm and Compare
Address
Offset
Register
Name
Bit
Numbers Name
R/W
Reset
Value
Description
0x0C
Alarm
[31:0]
Alarm
Lower
R/W
0
Sets the alarm (wake-up) time on write and returns the
alarm time on read.
0x10
[31:0]
Alarm
Upper
R/W
0
Sets the alarm (wake-up) time on write and returns the
alarm time on read.
0x14
Compare
[31:0]
Compar
e Lower
R/W
0
Sets the compare bits on the alarm time on write and
returns the compare value on read.
0: Bit is ignored
1: Bit is compared
0x18
[31:0]
Compar
e Upper
R/W
0
Sets the compare bits on the alarm time on write and
returns the compare value on read.
0: Bit is ignored
1: Bit is compared
Table 611 •
Date and Time
Address
Offset
Register
Name
Bit
Numbers Name
R/W
Reset
Value
Description
0x20
Date Time
[31:0]
Datetime
Lower
R/W
0
Writes the data to be uploaded to the counter and
returns the current time upon reading.
0x24
[31:0]
Datetime
Upper
R/W
0
Writes the data to be uploaded to the counter and
returns the upper time bits that are in alignment with
the last read lower bits; that is, the value of the upper
time bits as the lower ones are read.
0x30
Date/Time
Synchronized
Byte Mode
[5:0]
Seconds
R/W
0
Synchronized mode returns the date/time values at
the point the second's register is read. Allows the
individual byte of the date and timer to be read.The
complete RTC data is read and stored internally
when the second value is read, reads of minutes etc
returns the value when seconds was read.
For writes, all fields (0 × 30 - × 4C) must be written.
The control register upload bit uploads data to the
RTC.
These registers are for use when clock_mode = 1.
0x34
[5:0]
Minutes
R/W
0
0x38
[4:0]
Hours
R/W
0
0x3C
[4:0]
Day
R/W
0
0x40
[4:0]
Month
R/W
0
0x44
[7:0]
Year
R/W
0
0x48
[2:0]
Weekday
R/W
0
0x4C
[5:0]
Week
R/W
0