CAN Controller
UG0331 User Guide Revision 15.0
452
At power-up, the CAN_SOFTRESET bit is asserted as 1. This keeps the CAN controller in a reset state.
To release the CAN controller from reset, set this bit to 0 as described in
CAN_SOFTRESET is 0, the CAN controller could still be held in reset by other system reset sources.
Before specifying the CAN controller configurations, release it from reset.
12.6.2
CAN Controller Registers
This section describes the register and bit description of various categories of registers in the CAN
controller. In addition, system registers which are applicable to CAN are described in this section. This
provides programmers the view for firmware development. Microsemi recommends using drivers
provided in the tool set for application development.
The CAN base address resides at 0x40015000 and extends to address 0x40015FFF in the Cortex-M3
processor memory map. The registers set in the CAN controller are summarized in
0x1A4
W1P
SYSRESET_N Clear EDAC counters
This is a pulse generated to clear the
16-bit counter value in CAN
corresponding to the count value of
EDAC 1-bit or 2-bit errors. This in turn
clears the upper 16-bits of
CAN_EDAC_CNT register.
Table 440 •
CAN Controller Soft Reset Bit in the SOFT_RESET_CR Register
Bit Number
Name
R/W
Reset Value
Description
13
CAN_SOFTRESET
R/W
0x1
Controls reset input to CAN Controller
0: Release CAN controller from reset.
1: Keep CAN controller in reset.
Table 441 •
Summary of CAN Controller Registers
Register Name
Address R/W
Reset Value Description
0x018
R/W
0
CAN configuration register.
The CAN controller has to be configured
prior to its use. The configuration includes
effective CAN data rate, CAN data
synchronization, and message buffer
arbitration. This register has to be configured
before the CAN controller is started (Run
mode).
Run or STOP of the CAN controller is a
different action than reset. Refer to the
page 455 for more
details.
Table 439 •
CAN SYSREG Control Registers
(continued)
Register Name
Address
Offset
Register
Type
Flash
Write
Protect Reset Source Description