Embedded NVM (eNVM) Controllers
UG0331 User Guide Revision 15.0
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5.2.5.5
eNVM Read Operations with Timing Diagrams
The following are the example eNVM read operations with the Cortex-M3 processor operating at 166
MHz. The eNVM NV_FREQRNG is set to 6.
5.2.5.5.1
Single Word Read
The following figure shows the AHB read command to 0x60001000 starting at the first cursor, and data
being returned at the second cursor 9 clock cycles later.
Figure 69 •
Timing Diagram Showing Single Word Read Operation
5.2.5.5.2
Consecutive Reads Incrementing through Memory
In this case, four reads from addresses 0x60000010, 0x60000014, 0x60000018, and 0x6000001C are
initiated by the AHB master in succession. The first word is returned 9 clock cycles later (as shown in the
preceding figure), but the second word occurs in the following cycle, 9 clock cycles later the third word is
provided and the fourth word occurs in the next clock cycle. This pattern is repeated as the memory is
incremented as shown in the following figure.
Figure 70 •
Timing Diagram Showing Consecutive Reads Incrementing through Memory