Infineon Technologies XC2200, User Manual

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XC2200 Derivatives
System Units (Vol. 1 of 2)
The External Bus Controller EBC
User’s Manual 9-17 V2.1, 2008-08
EBC_X8, V1.0d1
9.3.4 The Timing Configuration Registers TCONCSx
The timing control registers are used to program the described cycle timing for the
different access phases (see
Section 9.2.2 ). The timing control registers may be
reprogrammed during code fetches from the affected address window. The new settings
are first valid for the next access.
TCONCS0
Timing Cfg. Reg. for CS0
XSFR (EE10
H
/--) Reset Value: 7C3D
H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- WRPHF RDPHF PHE PHD PHC PHB PHA
- rw rw rw rw rw rw rw
Field Bits Type Description
WRPHF [14:13] rw Write Phase F
00
B
0 clock cycles
… …
11
B
3 clock cycles (default)
RDPHF [12:11] rw Read Phase F
00
B
0 clock cycles (default)
… …
11
B
3 clock cycles
PHE [10:6] rw Phase E
00000
B
1 clock cycle
… … (default: 9 clock cycles)
11111
B
32 clock cycles
PHD 5 rw Phase D
0
B
0 clock cycles (default)
1
B
1 clock cycle
PHC [4:3] rw Phase C
00
B
0 clock cycles (default)
… …
11
B
3 clock cycles
PHB 2 rw Phase B
0
B
1 clock cycle (default)
1
B
2 clock cycles