XRT86VL38
PRELIMINARY
xr
OCTAL T1/E1/J1 FRAMER/LIU COMBO
REV. P1.0.6
375
X
Y
: The Xth payload bit of Channel Y
3.
The local Terminal Equipment also multiplexes signaling bits with payload bits and sends them together
through the 12.352Mbit/s data stream. When the Terminal Equipment is sending the fifth payload bit of
each channel, instead of sending it twice, it inserts the signaling bit A of that corresponding channel. Simi-
larly, the sixth payload bit of a each channel is followed by the signaling bit B of that channel; the seventh
payload bit is followed by the signaling bit C; the eighth payload bit is followed by the signaling bit D.
The following table illustrates how payload bits and signaling bits are multiplexed together into the 12.352Mbit/
s data stream.
X
Y
: The Xth payload bit of Channel Y
A
Y
: The signaling bit A of Channel Y
4.
Following the same rules of Step 2 and 3, the local Terminal Equipment continues to map the payload data
and signaling data of four channels into a 12.352Mbit/s data stream.
The Transmit Single-frame Synchronization signal of Channel 0 pulses HIGH for one clock cycle at the first bit
position (F-bit of channel 0) of the multiplexed data stream with data from Channel 0-3 multiplexed together.
The Transmit Single-frame Synchronization signal of Channel 4 pulses HIGH for one clock cycle at the first bit
position (F-bit of Channel 4) of the data stream with data from Channel 4-7 multiplexed together. By sampling
the HIGH pulse on the Transmit Single-frame Synchronization signal, the framer can position the beginning of
the multiplexed DS1 frame. It is responsibility of the Terminal Equipment to align the multiplexed transmit serial
data with the Transmit Single-frame Synchronization pulse.
Inside the framer, all the "don't care" bits will be stripped away. The framing bits, signaling and payload data are
de-multiplexed inside the XRT86VL38 and sent to each individual channel. These data will be processed by
each individual framer and send to the LIU interface. The local Terminal Equipment provides a free-running
1.544MHz clock to the Transmit Serial Input clock of each channel. The framer will use this clock to carry the
processed payload and signaling data to the transmit section of the device. Figure 91 shows how to connect
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
2
0
2
0
2
1
2
1
2
2
2
2
2
3
2
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
5
0
A
0
5
1
A
1
5
2
A
2
5
3
A
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
6
0
B
0
6
1
B
1
6
2
B
2
6
3
B
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
7
0
C
0
7
1
C
1
7
2
C
2
7
3
C
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
8
0
D
0
8
1
D
1
8
2
D
2
8
3
D
3