XRT86VL38
PRELIMINARY
xr
OCTAL T1/E1/J1 FRAMER/LIU COMBO
REV. P1.0.6
263
1
RxAIS-CI
RUR/
WC
0
Change in Receive AIS-CI Condition Interrupt Status
This Reset-Upon-Read bit field indicates whether or not the
“Change in AIS-CI Condition” interrupt within the T1 Receive Framer
Block has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive T1 Framer block detects the AIS-CI
Condition.
2.
Whenever the Receive T1 Framer block no longer detects the
AIS-CI Condition
0 = Reading a ‘0’ indicates the “Change in AIS-CI Condition” inter-
rupt has NOT occurred since the last read of this register
1 = Reading a ‘1’ indicates the “Change in AIS-CI Condition” inter-
rupt has occurred since the last read of this register
0
RxRAI-CI
RUR/
WC
0
Change in Receive RAI-CI Condition Interrupt Status
This Reset-Upon-Read bit field indicates whether or not the
“Change in RAI-CI Condition” interrupt within the T1 Receive
Framer Block has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive T1 Framer block detects the RAI-CI
Condition.
2.
Whenever the Receive T1 Framer block no longer detects the
RAI-CI Condition
0 = Reading a ‘0’ indicates the “Change in RAI-CI Condition” inter-
rupt has NOT occurred since the last read of this register
1 = Reading a ‘1’ indicates the “Change in RAI-CI Condition” inter-
rupt has occurred since the last read of this register
T
ABLE
153: C
USTOMER
I
NSTALLATION
A
LARM
S
TATUS
R
EGISTER
R
EGISTER
553 C
USTOMER
I
NSTALLATION
A
LARM
S
TATUS
R
EGISTER
(CIASR) H
EX
A
DDRESS
: 0
X
nB40
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION