BAT32G1x9 user manual | Chapter 4 Clock generation circuit
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Rev.1.02
4.8.3.3
Vibration Stop Detection Mode Register (SCMMD)
The Oscillation Stop Detection Mode Register (SCMMD) is a register that selects the object of
vibration stop detection as the primary system clock (fmx) or the secondary system clock (fsx), and whether
the action after the vibration stop is detected is to generate a reset or an interrupt.
Use 16-bit operation instructions to manipulate the SCMMD registers.
Figure 4-31 Format of the Vibration Stop Detection Mode Register
(SCMMD
).
Address: 0x40022202
After reset: 0000H R/W
symbol
15
14
13
12
11
10
9
8
SCMMD
KEY
Note
symbol
7
6
5
4
3
2
1
0
SCMMD
0
0
0
0
0
0
MDSEL CKSEL
CKSEL
Vibration stops detecting objects
0
Detects the vibration status of the main system clock (fmx).
1
Detects the vibration status of the subsystem clock (fsx).
MDSEL
Vibration stops the action after detection
0
An interruption occurs after the vibration stop is detected
1
Vibration stops detecting and produces a reset
Note: When rewriting MDSEL and CKSEL, the high 8 bit (KEY) of SCMMD must be written at the
same time 0x3C.
For example, after resetting, the initial value of the SCMMD register is 0x00, and the CKSEL
position is 1 by writing 0x3C01 to the SCMMD register.
4.8.3.4
Vibration Stop Detection Status Register (SCMST)
The Oscillation Stop Detection Status Register (SCMST) is a register that displays the vibration stop
detection status.
Use 8-bit operating instructions to manipulate the SCMST registers.
Figure 4-32 Format of the Vibration Stop Detection Status Register
(SCMST
).
Address: 0x40022204
After reset: 000H R/W
Note
symbol
7
6
5
4
3
2
1
0
SCMST
0
0
0
0
0
0
0
OSTDF
OSTDF
The state of vibration stop detection
0
Vibration stop is not detected
1
Vibration stops being detected
Note: After the vibration stops having a checkout, place OSTDF at position 1, which can only be written to 0
through the write register.
