BAT32G1x9 user manual | Chapter 26 Interrupt function
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Chapter 26 Interrupt function
The Cortex-M0+ processor has a built-in nested vector interrupt controller (NVIC) that supports up to 32
interrupt request (IRQ) inputs, as well as an unshielded interrupt (NMI) input, as well as multiple internal
exceptions.
The system extends 32 Interrupt Request (IRQ) inputs and 1 Unshielded Interrupt (NMI) input to support
up to 96 interrupt sources, as well as one unshielded interrupt source. This user manual only describes the
extended functions in this system, the Cortex-M0+ processor has built-in NVIC functions, please refer to the
Cortex-M0+ processor user manual.
26.1 The types of interrupt function
There are two types of interrupt functions.
(1)
Interrupts can be masked
This is an interrupt that is subject to masking control. If the interrupt mask flag register is not open, the
interrupt request will not be responded to, even if it is generated.
It can generate a standby release signal to cancel deep sleep mode and sleep mode.
Maskable interrupts are divided into external interrupt requests and internal interrupt requests.
(2)
Interrupts cannot be masked
This is an interrupt that does not accept masking control, and the CPU must respond once an interrupt
request is generated.
26.2 Interrupt sources and structures
Suspend source column table reference Table 26-1.
