BAT32G1x9 user manual | Chapter 6 Universal timer unit Timer4/8
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Rev.1.02
Fig6-65 Operating steps when the pulse output function is triggered single (2/2).
set TOEmp bit (slave) to '1' (only limit to restart operation).
Set TSmn bit)(master control) and TSmp bit(slave) of timer
channel start register m(TSm) both to '1'.
Because TSmnn bit and TSmp bit are trigger bits, thus
automatically return to '0'.
TEmn bit and Temp bit turn into '1' and master channel enter into start
trigger (detect Timn pin input valid edge or set TSmn bit to '1')
detection waiting state.Counter still in stop state.
start master channel counting while detecting master channel
start trigger.
• Detect TImn pin input valid edge
• set TSmn bit of master channel to“1”via software. Note.
master channel start counting
in operation
can only modify configure value of CISmn1 bit and CISmn0 bit
of TMRmn register.
Forbidden modifying TMRmn, TMRmp register and TOMmn
bit, TOMmp bit, TOLmn bit and TOLmp bit configuration.
Can read TCRmn register and TCRmp register anytime.
Can not use TSRmn register and TSRmp register.
can modify slave channel Tom regsiter and TOEm register
configuration.
master channel load TDRmn register value into Timer technical
register (TCRmn) via detecting start trigger (detecting Timn pin input
valid edge or set TSmn bit of master channel to "1"), and perform
decremental counting. If TCRmn counts till "0000H", then generating
INTTMmn, and stop counting before next Timn pin input.
Slave channel use INTTMmn of master channel as trigger, will load
TDRmp register value into TCRmp regiter and counter start
decremental counting. 1 counting clock cycle after master chanel
outputs INTTMmn, it sets T0mp otuput voltage to valid voltage level.
Then, if TCRmp count reaches "0000H", then set T0mp output voltage
set to invalid votlage levle then stoop counting. Thereafter, the process
repeats.
set TTmn bit (master) and TTmp bit(slave) to '1'.
Because TTmn bit and TTmp bit are trigger bits, thus
automatically return to '0'.
TEmn bit and Temp bit turn into '0' and stop counting.
TCRmn register and TCRmp register hold counted value and stop
counting.
T0mp output not initialized and remains unchanged.
set TOEmp bit of slave channel to '0', and configure TOmp bit.
T0mp pin output T0mp configured voltage level.
Scenarios to maintain T0mp pin output voltage:
set T0mp bit to '0' after set hold value to port register
configuration.
In case T0mp pin output voltage does not need to be held: no
configuration requried
maintain T0mp pin output voltage via Port function.
set TM4mEN bit of peripheral enable register 0 (PER0) to '1'
Timer Unit m input clock is not been provided.Perform initialization to
all circuit and SFR of all channels.
(TO00 bit turns into '0' and TO00 pin becomes port function)
timer 4 stop
stop operation
Start operation
re
s
ta
rt
o
p
e
ra
tio
n
Note: m: Unit number (m=0,1) n: Master channel number (n=0,
2, 4, 6).
p: Slave channel number (m=0Time:n
＜
p≤3
，
m=1Time:n
＜
p≤7)
