BAT32G1x9 user manual | Chapter 32 Security features
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Rev.1.02
32.3.5
Frequency detection function
The IEC60730 standard requires confirmation that the oscillation frequency is normal.
The frequency detection function uses the CPU/peripheral hardware clock frequency (f
CLK
) and can
determine whether the ratio of the two clocks is correct by measuring the Channel 1 input pulse of Timer4.
However, if a certain clock or 2 clocks stop oscillating, it is impossible to judge the ratio relationship of
the 2 clocks.
< the clock > to compare
(1) CPU/peripheral hardware clock frequency (f
CLK
):
• High speed internal oscillator clock (f
IH
).
• High speed system clock (f
MX
).
(2) Channel 1 input of Timer4:
• Timer input (TI01) for channel 1
• Low speed internal oscillator clock (f
IL
: 15kHz (TYP.). )
• Sub-System Clock (f
SUB
)
Note
Figure 32-10
frequency detection function
Univeral Timer Unit 0
(Timer 40) channel 1
watchdog Timer
(WDT)
low speed internal
osc clock
(15Khz(TYP))
secondary system
clock (fsub)
high speed system
clock(fMX)
high speed internal osc
clock(fIH)
f
CLK
f
IL
s
e
le
c
to
r
s
e
le
c
to
r
TI01
When the measurement of the input pulse interval is an abnormal value, it can be judged as "clock
frequency abnormality". For the measurement method of the input pulse interval, please refer to "6.8.4
Operation as input pulse interval measurement".
Note Only products with built-in subsystem clocks can be selected.
32.3.5.1
The timer input selects register 0 (TIS0).
For a register description, refer to Section 6.3.8.
