Cmsemicon BAT32G1 9 Series, User Manual, Page: 199 / 1149

BAT32G1x9 user manual | Chapter 6 Universal timer unit Timer4/8
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6.8.4 Operation as input pulse interval measurements
The count value can be captured at the effective edge of TImn and the interval between TImn input pulses can
be measured. During the period when the TEmn bit is "1", the software operation (TSmn=1) can also be set to
capture trigger, and the capture count value can also be set.
The pulse interval can be calculated using the following calculation equation:
Note: Because the TImn pin input is sampled by the operating clock selected by the CKSmn bit of the timer mode
register mn (TMRmn), an error of one operating clock is generated.
In capture mode, the timer count register mn (TCRmn) is used as an increment counter.
If the channel start trigger bit (TSm) of the timer channel start register m(TSm) is set to "1", the TCRmn register
is clocked from "0000H" Start incrementing the count.
If a valid edge of the TImn pin input is detected, the count value of the TCRmn register is transmitted (captured)
to the timer data register mn (TDRmn) and the TCRmn register is cleared" 0000H", then output INTMmn. At this point,
if the counter overflows, the OVF position of the timer status register mn (TSRmn) is "1". If the counter does not
overflow, the OVF bit is cleared. After that, the same run continues.
While the count value is captured to the TDRmn register, the OVF bit of the TSRmn register is updated according
to whether there is an overflow during the measurement, and the overflow status of the captured value can be confirmed.
Even if the counter performs a full count of 2 cycles or more, it is considered to have overflowed and the OVF
position of the TSRmn register is considered to be "1". However, when 2 or more overflows occur, the interval value
cannot be measured normally by the OVF bit.
The STSmn2~STSmn0 position of the TMRmn register is "001B", and the effective edge of TImn is used for
start triggering and capture triggering.
Fig. 6-51 an example of the basic timing of the operation of the input pulse interval measurement (MDmn0=0).
TSmn
TEmn
TImn
TCRmn
TDRmn
INTTMmn
OVF
Note 1.m: Unit number (m=0,1) n: Channel number (when m=0: n=0~3, m=1: n=0~7).
2.
TSmn
: Bitn of the timer channel start register m(TSm
).
TEmn : The timer channel enable bitn
of the status register
m(TEm
).
TImn input pulse interval = the week of the counting clock
×
((100 00H
×
TSRmn: OVF) + (TDRmn catch
value +1)).