BAT32G1x9 user manual | Chapter 8 Timer B
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Rev.1.02
An example of alternating outputs is shown in Figure 8-22. In this example, the TB register is set to cycle count
operation (the counter is cleared when the comparison matches B) and alternate outputs occur when either match A
or match B is compared.
(a) The comparison matching output must be selected from the "L" level output, the "H" level output, and the
alternating output through the TBIOR register. If set to waveform output mode, the ports are relatively matched
output pins (TBIO0, TBIO1).
(b) The TBGRA register and TBGRB registers must be set to match the occurrence timing.
(c) The TBSTART position of the TBBMR register must be placed "1" to start counting the TB registers.
Even if the TBSTART position is "0" during operation, the output pins that match the comparison (TBIO0, TBIO1)
are not initialized. To return to the initial value, the output is initialized by writing the TBIOR register (however, only the
TBIO00 bits, TBIO01 bits, TBIO10 through the TBIOR registers Bits and TBIO11 bits are initialized when they are set
to the "L" level output or the "H" level output). By setting the TBCCLR registers at TBCCLR bits 0 and TBCCLR 1 bits,
the input capture/comparison matches (and TBGRA.) Resets the count value of timer B when the registers or TBGRB
registers are the same. At this point, if the comparison expected value is "FFFFH", it changes from "FFFFH" to
"0000H" in the same way as the overflow, and the TBOVF bit is "1". The same is true in the mode of output comparison
using timer B and comparing expected values.
Figure 8-22
is an example of a run with alternating outputs
TBIO1 output
TBIO0 output
TBGRA register
TBGRB register
Value of TB register
clear counter while TBGRB register compare matching
Time
switching output
switching output
0000H
